{"id":26950,"date":"2026-09-27T19:57:30","date_gmt":"2026-09-27T17:57:30","guid":{"rendered":"https:\/\/www.itspy.cz\/thesis\/klasifikace-sifrovaneho-provozu-v-pocitacovych-sitich-svyuzitim-technologie-fpga\/"},"modified":"2026-09-27T20:08:39","modified_gmt":"2026-09-27T18:08:39","slug":"klasifikace-sifrovaneho-provozu-v-pocitacovych-sitich-svyuzitim-technologie-fpga","status":"publish","type":"thesis","link":"https:\/\/www.itspy.cz\/sk\/thesis\/klasifikace-sifrovaneho-provozu-v-pocitacovych-sitich-svyuzitim-technologie-fpga\/","title":{"rendered":"Klasifikace \u0161ifrovan\u00e9ho provozu v po\u010d\u00edta\u010dov\u00fdch s\u00edt\u00edch s\nvyu\u017eit\u00edm technologie FPGA"},"content":{"rendered":"<p>\u0160ifrov\u00e1n\u00ed s\u00ed\u0165ov\u00e9 komunikace chr\u00e1n\u00ed soukrom\u00ed u\u017eivatel\u016f, ale<br \/>\nspr\u00e1vc\u016fm s\u00edt\u00ed zt\u011b\u017euje pr\u00e1ci. Neuronov\u00e9 s\u00edt\u011b v\u0161ak umo\u017e\u0148uj\u00ed s<br \/>\nvysokou p\u0159esnost\u00ed odhadnout typ provozu i bez jeho<br \/>\nde\u0161ifrov\u00e1n\u00ed. K tomu sta\u010d\u00ed jednoduch\u00e9 informace, jako jsou<br \/>\nvelikosti paket\u016f a jejich \u010dasov\u00e9 rozestupy. Nap\u0159\u00edklad pokud<br \/>\nu\u017eivatel ode\u0161le e-mail, vznikne jin\u00e1 sekvence datov\u00fdch<br \/>\npaket\u016f ne\u017e p\u0159i streamov\u00e1n\u00ed videa.<\/p>\n<p>M\u00e1 pr\u00e1ce se v\u011bnuje n\u00e1vrhu takov\u00e9 neuronov\u00e9 s\u00edt\u011b, jej\u00edmu<br \/>\ntr\u00e9nov\u00e1n\u00ed a p\u0159edev\u0161\u00edm jej\u00edmu nasazen\u00ed pro anal\u00fdzu s\u00ed\u0165ov\u00e9<br \/>\nkomunikace v re\u00e1ln\u00e9m \u010dase. Aby tato s\u00ed\u0165 st\u00edhala analyzovat<br \/>\nvysokorychlostn\u00ed linky (nap\u0159\u00edklad 400 Gb\/s), navrhl jsem<br \/>\nzp\u016fsob, jak ji efektivn\u011b integrovat p\u0159\u00edmo do s\u00ed\u0165ov\u00e9 karty.<\/p>\n<p>Podobn\u00e9 syst\u00e9my v praxi ji\u017e existuj\u00ed. Mnou navr\u017een\u00e1 s\u00ed\u0165 a<br \/>\nzp\u016fsob jej\u00edho mapov\u00e1n\u00ed do FPGA v\u0161ak umo\u017enily vytvo\u0159it<br \/>\nsyst\u00e9m p\u0159ekon\u00e1vaj\u00edc\u00ed dosavadn\u00ed \u0159e\u0161en\u00ed v \u0159ad\u011b velmi<br \/>\nd\u016fle\u017eit\u00fdch parametr\u016f. Tento syst\u00e9m umo\u017en\u00ed nejen p\u0159esn\u011bji<br \/>\nrozpozn\u00e1vat a blokovat nebezpe\u010dn\u00e9 s\u00ed\u0165ov\u00e9 toky, ale tak\u00e9<br \/>\npokr\u00fdt v\u011bt\u0161\u00ed objem komunikace.<\/p>\n","protected":false},"featured_media":26773,"template":"","meta":{"_acf_changed":false,"_links_to":"","_links_to_target":""},"university":[190,188],"thesis-year":[468],"class_list":["post-26950","thesis","type-thesis","status-publish","has-post-thumbnail","hentry","thesis-year-468"],"acf":{"autor":"Luk\u00e1\u0161 Nevrkla","portret":"","vedouci":"doc. Ing. Tom\u00e1\u0161 Mart\u00ednek, Ph.D."},"_links":{"self":[{"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/thesis\/26950","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/thesis"}],"about":[{"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/types\/thesis"}],"version-history":[{"count":1,"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/thesis\/26950\/revisions"}],"predecessor-version":[{"id":27115,"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/thesis\/26950\/revisions\/27115"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/media\/26773"}],"wp:attachment":[{"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/media?parent=26950"}],"wp:term":[{"taxonomy":"university","embeddable":true,"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/university?post=26950"},{"taxonomy":"thesis-year","embeddable":true,"href":"https:\/\/www.itspy.cz\/sk\/wp-json\/wp\/v2\/thesis-year?post=26950"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}